The present invention relates to a frequency synthesizer for producing a signal of a preset frequency, and more particularly to a frequency synthesizer which is employed, for example, in a local signal generator for determining a receiving signal frequency of a spectrum analyzer, a signal generator for measuring frequency characteristics of various transmitting apparatuses and what is called a signal generator for generating a predetermined frequency signal for similar measuring or detecting use.
In a conventional frequency synthesizer, an analog signal corresponding to a set frequency is produced by a D-A converter and the oscillation frequency of a voltage-controlled oscillator is controlled by the analog signal to oscillate substantially at the set frequency. The output from the voltage-controlled oscillator is frequency converted by an output signal from a frequency signal generator and the frequency-converted output and a reference frequency signal are phase compared and, by the phase-compared output, the voltage-controlled oscillator is controlled to set up a phase lock loop. When the set frequency is changed, the output signal frequency of the frequency signal generator is also altered correspondingly. With the phase lock loop, it is possible to obtain from the voltage-controlled oscillator an output which is of a correct frequency dependent upon the frequency accuracy of the reference frequency signal, and this output is of low noise. With such a conventional frequency synthesizer, however, it is difficult to vary its output frequency over a wide range. That is to say, since the oscillation frequency-control voltage characteristic of the voltage-controlled oscillator is nonlinear and has hysteresis, and since the phase lock loop has a narrow capture range to provide a large loop gain in its locked-in state, it may happen in some cases that the oscillation frequency of the voltage-controlled oscillator is not within the capture range of the phase lock loop when the set frequency has been altered.
To get over this problem, it has been considered to adopt such an arrangement as follows: The output from a voltage-controlled oscillator is frequency divided by a variable frequency divider, the frequency-divided output is phase compared with a reference frequency signal and the voltage-controlled oscillator is controlled by the phase-compared output, thus constituting a first phase lock loop, and, further, the output from the voltage-controlled oscillator is phase compared with a frequency signal from a frequency signal generator and the variable frequency oscillator is controlled by the phase-compared output, thus constituting a second phase lock loop. The second phase lock loop has a larger loop gain in its locked-in state than does the first phase lock loop. The oscillation frequency of the voltage-controlled oscillator is varied by changing the frequency of the frequency signal from the frequency-signal generator with the frequency dividing ratio of the frequency divider. In this case, the voltage-controlled oscillator can be made to oscillate at a set frequency but, in order to enlarge the capture range, it is necessary to augment the frequency dividing ratio of the variable frequency divider, resulting in the loop gain of the first phase lock loop becoming small. For reducing the changing step of frequency with which the set frequency is altered, it is necessary that the cutoff frequency of a loop filter in the first phase lock loop be selected low and this brings about the defect of much time being needed for the first phase lock loop to reach its locked-in state after changing the set frequency.